A Medical Electronics Manufacturing Fall 1997 Feature

ELECTROMAGNETIC COMPATIBILITY

Chris M. Kendall

Using high-frequency design methods along with PCB layout and CM filtering results in medical devices that can withstand immunity threats.

With the advent of recent national and international immunity standards, manufacturers of medical electronic equipment have become increasingly concerned about how to design sensitive devices to withstand various transient and steady-state radio-frequency (RF) immunity threats. Emission issues are also a major concern, especially with the use of higher-speed clock circuits.

Electrostatic discharge test (IEC 801-2: 1991) being performed according to EN 60601-1-2.

While many feel that the measures used for emission control will also solve all of the immunity hardening requirements, this is often not the case. Sensitive analog circuits coupled with restrictive leakage current and special external surface treatments for the case have resulted in numerous analog instrument amplifiers and comparator circuits being shut down in the presence of radiated field levels of less than 1 V/m.

Patient interface leakage requirements also make the typical electromagnetic compatibility (EMC) design techniques of signal cable decoupling and cable shielding less effective. This problem has created new solutions in terms of developing effective hardening methods. The key often lies in the printed circuit board (PCB) layout and internal interconnect choices. Thinking in terms of transmission line and high-frequency impedance control methods, even when designing low-frequency analog circuits, can result in effective EMC solutions.

The Threat

The requirements most designers have to deal with today center on FDA's EMC Reviewer Guidance for Premarket Notification Submissions and the European CE requirements that will center on EN 60601-1-2, which becomes mandatory in 1998. Until then, a dual path exists of following the generic EMC/EMI requirements of EN 60601-1-2, or EN 50081 and EN 50082. The basic requirements are identified in the sample test plan shown in Table I. Additional requirements­such as power-line magnetic fields immunity, power flicker, and power-line surges and sags­are under consideration and may become mandatory in the future.

Table I. Typical medical test plan, using EN 60601-1-2 (1993) and/or EN 50082-1 (1997) for immunity, and EN 55011 and EN 60555 part 2 (harmonics) for emissions.

FDA premarket notification requirements are far more comprehensive and represent special test methods that result in even higher immunity requirements. The agency borrowed a number of susceptibility requirements from the military and then added further test method restrictions to make them even more severe. When a manufacturer needs to file for 510(k) premarket notification covered by these EMC guidelines, compliance will need to be shown.

Estimating the Amount of Protection

Knowing the amount of protection given circuits will need to meet these requirements in terms of case shielding, circuit filtering, cable protection, and other methods is key. A number of software programs and books­such as EMCad (800/500-4EMC) and Albert Smith's book, Electromagnetic Coupling into Transmission Lines by Wyle Inter-science­can help with this assessment.

The following steps provide an example of how a quick approximation can be calculated.

• Start with the RF threat level in volts per meter (e.g., 3 V/m).

   

• Multiply by the field uniformity expected; 2x for full ferrite-lined rooms, and 4x for semianechoic rooms. (For this example, assume a full ferrite tile room, or 2x, yielding 6-V/m field.)

   

• Convert field to dB (6V/m = 136 dBµV/m).

   

• Subtract the basic tuned dipole loss factor for coupling between two tuned dipole antennae, or ­14 dB.

   

• Reduce ideal loss further if frequency coupling is below the resonant length of the cable, PCB trace, or equipment dimensions (­20 log^₁₀ f^₃/f^₀, where f^₃ is the quarterwave frequency of the length of cable, PCB trace, or equipment dimensions). For a cable whose length is 36 in., the quarterwave resonance frequency is 83.3 MHz. If f^₀ is 26 MHz, then the correction is ­10 dB.

   

• Sum up the dB values as follows: 136 ­ 14 ­ 10 = 112 dBµV across a load impedance of 100 .

   

• Converting 112 dBµV to linear units yields an induced voltage of 400 mV. As the load impedance increases, so will the induced voltage. For a 100,000- load, the voltage will increase to approximately one-third of the 6-V/m level, or 2 V.

   

• Comparing 0.4- to 2-V induced levels with typical circuit threshold values is needed for "in-band" threat frequencies. Assuming in this example that 26 MHz is within the amplifier's effective bandwidth, then a circuit threshold value of, say, 5 mV can be compared directly to the threat values yielding the needed protection. In this case, the needed protection varies from 20 log^₁₀ 0.4/0.005 to 20 log^₁₀ 2/0.005, or 38 to 52 dB, depending on load impedance.

This is only an approximation, and more rigorous analysis is recommended. The induced voltage range for this example varied from a factor of 1/150 to 1/80, depending on load impedance, and represents an estimate of the amount of induced voltage across the load impedance. Comparing the analog threshold value to this value will give an estimate of the amount of protection necessary. The needed protection can consist of: cable shield protection over the frequency range of the threat; cable shield termination protection; I/O L-C low-pass lead filtering at port-of-case entry; I/O CM choke filter (external or internal); differential line drivers and receivers; and optic isolators.

Figure 1. Radiated susceptibility of cables (plane wave). Amplitude in dBµV.

The same analysis performed using EMCad yields a plotted result as shown in Figure 1. This analysis shows that the induced voltage varies with frequency and, for 100- load and source impedance, will induce 118 dBµV, or 0.79 V, at the half-wavelength frequency associated with a 1-m external cable length (assumes no shielding). Comparing this level with the threshold value of 5 mV yields a 44-dB protection need.

Circuit Response

The amplifier response to a 26-MHz threat at first seems unreasonable, considering a typical instrumentation bandwidth capability. Internal IC protection diodes have the ability to dc-rectify the out-of-band RF induced signal and cause the amplifier to be dc-biased into a saturated state. Another possibility is for the nonlinear action of the diodes to block the RF but allow the modulation on the carrier (required to be 1 kHz) to be induced along with the true intended signal.

Possible solutions to out-of-band problems and their typical performance ranges are shown in Table II.

Table II. Possible solutions to out-of-band problems and typical performance ranges.

Hardening Analog Circuits

Methods for hardening analog circuits are as follows:

• Treating All Circuits As If They Were RF Circuits. Regardless of their operational frequency, all circuits need to be treated as high-frequency circuits to properly harden them against high-frequency threats. Shielding cables and terminating them at only one end while protecting the circuit against low-frequency ground loop currents exposes them to RF-field-induced voltages starting at the quarterwave resonant length of the cable and all higher frequencies. It is essential to design the RF protection to work over the entire RF band of the test requirement, which today is 150 kHz to 1 GHz.

   

• Grounding Shields at Only One End. At high frequencies, the threat is almost always common mode or pin-to-earth (or case) and not pin-to-pin. Therefore it is the pin-to-earth loops that need to be controlled. At high frequencies, the external E-fields couple RF currents onto the shielded cable. Current and voltage maximums develop at the quarterwave frequencies of the cable length. If the shielded cable is grounded only at one end, then the example of the 1-m shielded cable will become quarterwave resonant at 75 MHz. At cable resonant frequencies and above, the cable shield becomes ineffective (i.e., shielded cables effectively become unshielded).

   

• Grounding Shields at Both Ends. If the cable shield is grounded at both ends, its major threat will occur at its half-wavelength frequency of 150 MHz. If the shield termination is not coaxial but relies on drain wire terminations, the shield protection will virtually disappear at odd multiples of the resonant frequency. Single drain wire shield terminations mean that the half-wave current maximal will flow only through the drain wire, generating intense magnetic fields around the drain wire. If this drain wire is routed near other connector pins, the shield current will magnetically couple to the very leads that the shield is trying to protect.

   

• Terminating Coaxial Shields. Only by giving the shield current more than one path to ground can the magnetic fields begin to cancel each other and therefore protect the signal pins in the connector. For this reason, all connectors should be metallic and bonded to the case via direct metal-to-metal contact (conductivity-finished surfaces on both the connector and the case). Shielded backshells should be employed such as those readily available for most sub-D connectors. The "dimpled" type sub-D that is tin plated should be used rather than the DIN and mini-DIN connectors. These should be used only if they have a full front metal surface that can be grounded to the case at both the top and bottom surfaces (symmetric termination). This prevents asymmetric shield currents and their resulting magnetic fields from being generated.

   

• Segregating Unshielded and Shielded Leads into Different Connectors. All signal circuit pins that are going to employ filtering to harden the I/O circuits should be located in the same connector. All pins in that connector should be filtered, including ground and spare leads. The size of the capacitors should not vary by more than 10-to-1 in value. Shielded leads and unshielded leads should not use the same connector. All shielded leads should be grouped together so they can use a standard method of termination. Multishielded cables should have their shields shorted together via a conductive metal band or should employ a special connector backshell that allows each shield to ground to the case of the connector.

Controlling Filter Capacitance Values

If signal leads are going to employ line-to-chassis capacitive filtering, then the amount of capacitance will be limited by the allowed leakage current. LC filters where the CM inductance is large will allow the pin-to-case capacitance to be small and stil l achieve the low pass filter insertion loss values needed to protect most circuits. In most cases, the line-to-chassis impedance of bridge and amplifier circuits is very high. Therefore, even a small amount of capacitance will be effective in protecting the circuit.

• Using Twisted Shielded Cable for Low-Frequency Analog Circuits. Often, analog designers stipulate that shielded signal cables must have the shield grounded at only one end. This is to prevent the serious threat of ground loop current from flowing on the shield and inducing a net voltage across the load impedance. In 1956, Boeing experienced such a problem on the 707 aircraft. Its study of the problem showed that the difference in the number of twists per unit length has a significant effect on the induced noise. At six twists or lays per foot, Boeing researchers found about 49 dB of noise rejection. At 18 twists or lays per foot, they found about 79 dB of noise rejection. When they grounded both ends of the cable twisted at 18 lays per foot, they found no change over grounding the cable only at one end in terms of the low-frequency "ground loop" noise. It seems that the added twisting significantly reduced the "ground loop" magnetic field coupling. Therefore, to harden sensitive analog signals, TSP cable twisted at 18 lays per foot should be used, and both ends of the shield should be grounded.

   

• Routing Internal I/O Signals in the PCB and Not via Leads. Routing of the internal leads from the connector should be via traces in the printed circuit board. These traces should be connected directly to the I/O connector pins. In this way, the signal traces can achieve maximum common mode (pin-to-chassis) impedance control to reduce coupling from high-frequency threats.

PCB Designs

The PCB design should provide for a full ground and power plane just like digital boards, and the mother or backplane board should ground all return planes together. In turn, these planes should be capacitively grounded to chassis with capacitive values selected according to the amount of case leakage permitted. The key to grounding is that the ground path must have minimum inductance. The best path is a short (< 0.5 in. long) conductivity-finished metallic standoff located at each mounting point. By chassis grounding the plane area just under the mounting studs and providing a small isolation to the full ground plane, a capacitor, a dc shunt, or nothing can be connected across the signal to chassis ground planes, giving the designer maximum flexibility in grounding.

If dc grounding is employed, the power supply should float power return reference from its chassis, providing one chassis connection reference for the system, namely at the mother or backplane board.

Transient Threats

The electrostatic discharge (ESD) and electrical fast transients (EFTs) are generally more of a concern to digital circuits than to analog circuits. The ESD event generates significant amounts of RF radiated energy between 5 and 200 MHz. This energy often peaks at the quarterwave resonant frequency of the person performing the test. Most human bodies self-resonate at between 35 and 45 MHz. Therefore, the peak radiated emissions from ESD also peak in this same frequency range.

The I/O cables are often resonant in this same range, and as a result receive significant amounts of the radiated ESD energy. Measured induced voltage levels across I/O cable termination loads show 600-V levels induced when the case is exposed to a 4- to 8-kV discharge. Such levels are well beyond the typical digital upset threshold value of 0.4 V. The typical induced pulse duration times are around 400 nanoseconds. Shielding the I/O cables and grounding at both ends with no internal signal lead exposure will reduce the levels 60 to 70 dB, yielding 0.3 V or less across the load.

EFTs also generate considerable radiated emissions that couple to cables and case circuitry. The coupling is similar to that experienced with ESD, but the discharge voltage levels are lower. The power supply EMC power-line filter provides the main protection to this transient. The CM line ground capacitors are normally the main devices used to shunt the transient currents to chassis and away from the internal circuitry. When this capacitance is limited by leakage current, the CM choke must provide more of the protection. This usually demands a special center tap common mode choke, where the center tap is shunted to chassis via a capacitor that complies with the leakage current limits. Typical inductance values are 15­20 mH wound on a high-permeability ferrite core (typically 7000­10,000 µm).

Conclusion

The best approach is to treat all analog and digital circuits as high-frequency responsive and to use high-frequency design methods for cable shielding, PCB layout, and CM filtering methods. It is important to use full ground and power planes, even for analog circuits, to limit high-frequency common mode loops. Most transient threats are high frequency and cause significant radiated energy to be present. It is often this radiated energy that couples via I/O cables into a given piece of equipment. Often this energy comes in on analog leads, recouples to high-speed digital circuits, and causes them to respond adversely. By filtering all analog and digital leads, proper protection can be achieved.

Chris M. Kendall is principal consultant and CEO at CKC Laboratories, Inc. (Mariposa, CA).