For medical electronics, nonvolatile static random-access memory (nvSRAM) has features that offer data security and performance benefits for in-the-body devices.
Originally Published MEM Fall 2008
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Figure 1. Normal waveform (a), and abnormal waveform (b), showing the elevated ST wave segment.
One of the most important design considerations of heart monitoring equipment is to ensure that critical data are never lost. In many circumstances, failing to capture and store 100% of patient-critical data can be a matter of life and death, and therefore cannot be tolerated in modern designs. Careful attention must be paid to selecting the correct nonvolatile memory used in these systems.
Each year, there are more than 350,000 cases of sudden cardiac death (SCD) in the United States alone, and more than 20% of these cases involve people with no outward signs of serious heart disease. That means that sudden death is the first symptom of heart disease, which is not a comforting prospect. However, significant strides have been made in the design and manufacture of implantable cardioverter-defibrillators (ICDs). Surgically placed inside the patient's chest and attached to the heart, ICDs perform the following four basic functions:
This article focuses on the first of these four functions: the acquisition, storage, and retrieval of waveform data.
ICDs deal with the same five basic waveforms that have been measured for more than a century. The P, Q, R, S, and T waves all combine to tell the cardiologist how the patient's heart is performing, and the challenge is to ensure that they are accurately captured, stored, and later recalled with zero chance of error or data loss. The waveforms of a healthy patient are shown in Figure 1a, while the waveforms of a patient experiencing a heart attack are shown in Figure 1b. Note that the ST wave segment is elevated in Figure 1b, a sign that blood flow to the heart has been restricted (ischemia), and the heart tissue has subsequently become damaged (infarct).
Comparative Look-Up Scheme
The method used by the ICD to detect anomalies, or out-of-limits events, is a comparative look-up scheme. In a nutshell, the ICD has stored within its internal memory the digital representation of many waveforms, called metadata, that are comprehensive examples of virtually all possible within-limits and out-of-limits waveforms that a given patient's heart may experience. These metadata are much like a unique fingerprint signature that allows digital data to be easily matched to other sets of similar digital data. The various metadata waveforms are selected by the physician and preprogrammed into the ICD before it's implanted in the patient. However, it's possible, and in fact very easy, for the waveform metadata to be changed after implantation without removal of the ICD device. (Changing waveforms will be discussed later in this article.)
During normal operation, the ICD takes each newly acquired set of heartbeat waveforms and immediately converts the analog data to digital data. Once in digital format, the ICD performs a number of calculations, conversions, and transformations to create the metadata representation of the waveform. Then it compares the waveform to the stored metadata waveforms to determine whether they are within limits or out of limits. If the result is within limits, no action is required and the process is repeated. If the result is out of limits, the ICD then determines, again by looking for a metadata match, the correct medical source of the anomaly and begins its response to treat the condition.
While these heart monitors can have an in-the-patient operational life easily exceeding a decade, they can't store 100% of the data that are acquired. It is impossible to store the data because of the limitations of the ICD's nonvolatile semiconductor memory capacity (10 years of continuous data storage would require the storage of more than 1.5 billion complex digitized waveforms).
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Figure 2. It is critical to ensure that data are stored safely before and after an event.
To deal with this problem, the ICD uses a rather novel approach. As it constantly gathers and stores data to memory, as long as the data fall within acceptable medical limits, these data can later be discarded. However, if and when out-of-limits events are encountered, it's critical that the waveform data gathered prior to the event, during the event, and after the event, are safely stored, as shown in Figure 2. Each ICD is preprogrammed with the appropriate length of time for before-event and after-event periods, which ensures that as soon as out-of-limits data are encountered, the ICD still has access to the before-event data. In addition to recording all out-of-limits event data, it will also continue to record the after-event data. The end result is that all of the before, during, and after event data are safely recorded and stored by the ICD.
Given that the number of out-of-limits events is small compared with the number of within-limits events, the ICD is now required to store a much smaller amount of waveform data and will subsequently have memory capacity sufficient for the entire life of the ICD.
A simplified block diagram of the ICD is shown in Figure 3a. The brain behind the unit is a single-chip device that combines a microcontroller unit (MCU) with a digital signal processor (DSP). In addition to being attached to the nonvolatile flash memory, the ICD is also attached to a number of functions. Those functions include the implanted heart sensors that acquire the waveform data; the pacing and defibrillation shock functions; and a wireless communication link that allows the physician to upload the stored waveform data for analysis, as well as to download changes to the internal settings of the ICD itself.
While semiconductor flash memory has been the leading choice as the nonvolatile memory component for storing the digitized record of these five waveforms in ICDs, it does have several shortcomings and limitations. First of all, because of its fundamental underlying manufacturing process technology, flash memory cells actually wear out after they have exceeded a finite number of read-write cycles. Once the memory cells have reached this state, they can no longer reliably retain data, resulting in lost or corrupted data. As one might imagine, this is unacceptable when the data are of such a life-and-death nature.
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Figure 3. A simplified block diagram of an ICD without nvSRAM (a) and with nvSRAM (b).
In the specific case of the ICD, this memory cell wear problem occurs because waveform data are constantly being written to the flash until its memory becomes full, and then the unneeded contents of the flash memory are erased so that new data can be written in their place. This process continues for years, and the flash begins to lose memory cells because of this constant churning of data.
The second shortcoming arises when some kind of momentary power-supply disturbance to the ICD occurs at a time when data are being written from the MCU to the flash device; at that time the heart monitor can actually lose data. Examples of power disturbances include exposures to high magnetic and electromagnetic fields; or sudden jolts involving severe G forces that may be caused by events like automobile accidents or falls from a ladder; or a patient being physically shocked by coming into contact with a source of electric power like an ungrounded power tool or home appliance.
Adding an nvSRAM
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Figure 4. An nvSRAM uses two memory cells (SRAM = blue; EEPROM = red).
Nonvolatile static random-access memory (nvSRAM) can address these issues (see Figure 3b). By the simple addition of a second nvSRAM, the two problems encountered with flash memory can be eliminated. The nvSRAM is unique in that it uses two different and distinct memory cells to store each bit of data: static random-access memory, or SRAM, and electrically erasable programmable read-only memory, or EEPROM, as shown in Figure 4. SRAM is an industry-standard memory device that can read and write data in incredibly short periods of time, and will retain its data as long as power is supplied to it. If power is removed, the data are lost. Unlike flash memory, the SRAM has an unlimited number of read-write cycles and, therefore, will never experience memory cell wearout.
The EEPROM, on the other hand, is a nonvolatile memory technology that stores data even when power is removed. During normal operation, all reads and writes take place with the SRAM. In the event of a power disturbance or loss of power, the entire contents of the SRAM are instantly copied to the EEPROM in a store operation. Power for this operation is supplied by a small external capacitor attached to the nvSRAM. Upon restoration of power, the contents of the EEPROM are copied back to the SRAM in a recall operation, and the SRAM is now in the exact state it was prior to the power failure.
To address the first shortcoming of flash—memory cell wearout—the nvSRAM can be logically placed between the MCU and the flash memory and can act as a data buffer (see Figure 3b.) In this role, data that would otherwise be written to the flash on a never-ending basis (and subsequently wearing out its memory cells) are written to the SRAM portion of the nvSRAM, which has no limitations on the number of read-write cycles. Data can be written, erased, and rewritten exclusively within the nvSRAM, until a heart-related out-of-limits event is encountered. At that time, the data are copied from the nvSRAM to the flash memory for long-term archiving. Because data are written to the flash only when out-of-limits events take place, the flash memory is no longer subjected to the constant churning of data that would otherwise take place with it.
The nvSRAM takes the brunt of the billions of read and write operations, and therefore spares the flash from this constant deluge of data. This process can continue for a period of time that far exceeds the operational life of the ICD.
|Figure 5. A flash page of 8192 bytes.|
Regarding the second shortcoming of flash—the possibility of losing data during a power disturbance—the nvSRAM comes to the rescue once again. Because an ICD based solely on flash memory will eventually fill up the flash memory, the unneeded data stored in the flash will need to be erased to make room for new data. Flash has a fundamental shortcoming as to how its memory cells are written and erased. Instead of selectively writing new data to individual memory cells as you can with SRAM memory, flash requires that you write large blocks of data each containing 512 bytes of data called sectors—every time you want to write even just a single bit of data. Even worse is erasing flash memory cells. Instead of erasing individual memory cells as you can with SRAM, flash requires that you erase a page of data, with each page containing 16 sectors (a total of 8192 bytes), as shown in Figure 5.
The problem arises when it comes time to erase a page; some of the data in the page are important out-of-limits data, while the remaining data are unneeded within-limits data. To ensure that the important data are retained and the unneeded data are erased, all of the important data must temporarily be copied from the flash to the MCU's internal memory and held there while the entire flash page is erased. Once the flash page erase operation is completed, the important data are rewritten back to the flash.
If a power disturbance occurs during this time, it's possible for the data that are temporarily stored in the MCU's memory to be lost, because the MCU's memory is not a nonvolatile memory. The data lost could be significant to the point that without those data, the physician could possibly make life-and-death decisions based on insufficient information.
By using the nvSRAM to store the temporary data during the flash page erase operation, the possibility of losing data is eliminated. Instead of storing the temporary data within the MCU's internal memory, they are stored within the nvSRAM. When, and only when, the data are safely stored inside of the nvSRAM, will the flash page be erased. This ensures that in the event of a power failure, the data will not be lost.
Last but not least, a unique by-product of the nvSRAM is that it can act as scratchpad memory for the system to compress the digital waveform metadata. This data compression is performed by the DSP engine and can take place either in real time or as a background task. Data compression requires the use of external memory, which involves a significant amount of data churning. This would accelerate the wear of flash cells if they were used as the scratchpad; hence, flash-only systems can't implement data compression. By adding the nvSRAM, however, there is no memory cell wearout, and because the data are compressed, the manufacturer can select a flash device that's up to 100 times lower in density, which reduces the physical size, power requirement, and cost of the flash memory.
The algorithms used to transform raw data into parametric metadata require a compute-intensive DSP operation and high-speed nonvolatile memory. Compression algorithms can extract the positions and parametric data for each segment of the different waveforms, and different compression algorithms can be used, depending on the specific characteristics of each waveform. For example, the least-squared-fit algorithm might compress the P and T waves, the QRS wave could use piecewise linear points and deltas, and the ST and PR segments could use two simple time offsets. In this way, a highly compact record is formed and can be computed by the DSP using the nvSRAM as its scratchpad memory.
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Figure 6. A flowchart of data compression and classification and response.
The data compression and classification strategy (see Figure 6) can transform the data set into information that is fully capable of reconstruction, within a given error band, of each individually processed wave set. The resulting heartbeat record of data sets can then be analyzed for missing or extra ST segments, elevated ST segments, etc.
Another performance factor should also be addressed. DSPs operate at incredibly fast speeds, which means that they require the fastest memory available. The onchip SRAM offers speeds as fast as 15 nanoseconds. No other nonvolatile memory can match the speeds of the nvSRAM.
In addition to the data collected and stored by the ICD being used for real-time monitoring and treatment of the patient, these data can serve a number of ancillary functions. First, through the use of an inductive coupler, the data can easily be downloaded for analysis by the attending physician.
This procedure can be thought of as wireless and therefore requires no surgery or other invasive procedures for the patient. Because only the out-of-limits data (along with the associated before and after event data) are stored by the ICD, the physician has access to a time-and-date-stamped treasure trove of historical information that provides a rich dataset for monitoring the patient's progress. Having such information allows the physician to make not only adjustments to the ICDs internal operating parameters, but also modifications to the patient's medications, diet, exercise, etc.
A second important use of the data is for ongoing improvement of the ICD device by its manufacturer. ICDs are currently experiencing phenomenal growth, both with respect to market expansion as well as functional and performance improvements. And engineers can use the data to provide software and firmware updates for current products, as well as to refine their designs for next-generation products currently on the drawing board.
In summary, the protection of data gathered by ICD devices can be a life-and-death matter. Adding an nvSRAM nonvolatile memory to an existing flash-based design can ensure that the data will be 100% secure, as well as protecting the flash from memory cell wearout. The nvSRAM also provides exceptionally fast scratchpad memory for DSP operations and allows the data to be compressed. Those benefits result in a significant reduction in data size and therefore allow smaller density flash memories to be used.
Rich Paulson is an applications engineer for Simtek Corp. (Colorado Springs, CO).