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PLL Chip Set Can Use Wide Loop Bandwidths

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A chip set is targeted at PLL and frequency modulated continuous wave (FMCW) sweeper applications requiring ultimate performance. The first part of the set, the HMC983LP5E dc to 7-GHz fractional-N divider, integrates a 48-bit delta-sigma modulator to achieve fractional frequency resolution of 180 nHz. A built-in frequency sweeper enables identical, coherent, FMCW frequency sweeps that can be linear, user-defined, automatic or triggered. The HMC984LP4E digital phase-frequency detector provides ultralow noise phase detector. A charge pump is capable of operating at 125 MHz in fractional mode, and 175 MHz in integer mode. This capability enables the PLL chip set to use wide loop bandwidths. The PLL chip set phase noise figure-of-merit performance is -231 dBc/Hz in integer mode and -227 dBc/Hz in fractional mode.

Hittite Microwave Corp.
Chelmsford, MA


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