A register-transfer-language (RTL) power model is designed to optimize a range of power-sensitive applications, such as ultralow-power electronics. RPM bridges the power gap between RTL design and physical implementation. The technology predicts integrated circuit (IC) power behavior at the RTL level with consideration for how the design is physically implemented. As a result, chip power delivery network (PDN) and IC package design decisions can be made early in the design process. As part of the company's PowerArtist-XP software, RPM's technologies include PowerArtist Calibrator and Estimator (PACE) for accurate power estimation at the RTL level. Fast Frame-Selector provides critical power-aware cycle selection. RPM also enables chip power integrity sign-off to be ensured for sub-28 nm ICs. 

Apache Design Inc.
San Jose, CA, 408/457-2000